/***************************************************************************
*   Copyright (C) 2010-2011 by swkyer <swkyer@gmail.com>                  *
*                                                                         *
*   This program is free software; you can redistribute it and/or modify  *
*   it under the terms of the GNU General Public License as published by  *
*   the Free Software Foundation; either version 2 of the License, or     *
*   (at your option) any later version.                                   *
*                                                                         *
*   This program is distributed in the hope that it will be useful,       *
*   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
*   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
*   GNU General Public License for more details.                          *
*                                                                         *
*   You should have received a copy of the GNU General Public License     *
*   along with this program; if not, write to the                         *
*   Free Software Foundation, Inc.,                                       *
*   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
***************************************************************************/
#ifndef __CPUINFO_H__
#define __CPUINFO_H__

#include "Ejtag.h"

#define MIPS_KSEG0                      0x80000000
#define MIPS_KSEG0_SIZE                 0x20000000
#define MIPS_KSEG1                      0xA0000000
#define MIPS_KSEG1_SIZE                 0x20000000

#define DEFAULT_ICACHE_LINE_SIZE        16
#define DEFAULT_ICACHE_LINES_PER_WAY    256
#define DEFAULT_ICACHE_WAYS             4
#define DEFAULT_DCACHE_LINE_SIZE        16
#define DEFAULT_DCACHE_LINES_PER_WAY    256
#define DEFAULT_DCACHE_WAYS             4
#define DEFAULT_ICACHE_SIZE             (DEFAULT_ICACHE_LINE_SIZE * DEFAULT_ICACHE_LINES_PER_WAY * DEFAULT_ICACHE_WAYS)
#define DEFAULT_DCACHE_SIZE             (DEFAULT_DCACHE_LINE_SIZE * DEFAULT_DCACHE_LINES_PER_WAY * DEFAULT_DCACHE_WAYS)
#define DEFAULT_TLB_ENTRY_SIZE          16

#define MIPS_ENDIAN_LITTLE              0
#define MIPS_ENDIAN_BIG                 1


typedef struct __mips32_cache
{
    uint16_t line_size;
    uint16_t lines_per_way;
    uint16_t ways;
} mips32_cache_t;

typedef struct __mips32_cpuinfo
{
    void *pmips32;

    mips32_cache_t icache;
    mips32_cache_t dcache;

    uint16_t tlb_entries;

    uint16_t hwbpts;
    uint16_t hwwpts;

    uint16_t sst_sup;
    uint16_t endian;
    uint16_t pcs;

    uint16_t fpu;               // support FPU?
    uint16_t sc_impl;           // L2 cache implement?
    mips32_cache_t scache;
} mips32_cpuinfo_t;


static inline uint32_t mips32_icache_size(mips32_cpuinfo_t *pcpuinfo)
{
    return pcpuinfo->icache.line_size * pcpuinfo->icache.lines_per_way * pcpuinfo->icache.ways;
}

static inline uint32_t mips32_dcache_size(mips32_cpuinfo_t *pcpuinfo)
{
    return pcpuinfo->dcache.line_size * pcpuinfo->dcache.lines_per_way * pcpuinfo->dcache.ways;
}

static inline uint32_t mips32_scache_size(mips32_cpuinfo_t *pcpuinfo)
{
    if (pcpuinfo->sc_impl)
        return pcpuinfo->scache.line_size * pcpuinfo->scache.lines_per_way * pcpuinfo->scache.ways;
    else
        return 0;
}


int mips32_cpuinfo_init(mips32_cpuinfo_t *pcpuinfo, void *pmips32);
int mips32_cpuinfo_exit(mips32_cpuinfo_t *pcpuinfo);
int mips32_cpuinfo_probe(mips32_cpuinfo_t *pcpuinfo);


#endif /* end of __CPUINFO_H__ */
